Answer to Question #268596 in Electrical Engineering for Neil

Question

Assume a 4-bit shift register using D flip flop which will take one clock cycle for loading the data and 3 clock cycles for getting the output, Identify the type of shift register and describe its operation with diagram.

Answer 1

There are four types of shift register:----

1) Serial In Serial Out shift register

2) Serial In Parallel Out shift register

3) Parallel In Serial Out shift register

4) Parallel In Parallel Out shift register

1. Serial In Serial Out shift register (SISO)

The shift register, which allows serial input and produces a serial output, is known as the Serial In Serial Out shift register. Since there is only one output, the data leaves the shift register one bit at a time in a serial pattern. The logic circuit consists of four D flip-flops which are connected in a serial manner. All these flip flops are synchronous with each other since the same clock signal is applied to each flip flop. The main use of a SISO is to act as a delay element.

2. Serial In Parallel Out shift register (SIPO)

The shift register, which allows serial input and produces a parallel output is known as SIPO shift register. The circuit consists of four D flipflops which are connected. The clear signal is connected in addition to the clock signal to all the four flipflops in order to Reset them. The output of the first flipflops is connected to the input of the next flipflop and so on.

All these flip flops are synchronous with each other since the same clock signal is applied to each flipflop. The main use of the SIPO register is to convert serial data into parallel data.

3. Parallel In Serial Out shift register (PISO)

The shift register, which allows parallel input and produces a serial output is knownnas PISO shift register.

The logic circuit consists of four D flipflops which are connected. The clock input is directly connected to all the flipflops but the input data is connected individually to each flipflops through a multiplexer at the input of every flipflops. The output of the previous flipflop and parallel data input are connected to the input of the MUX and the output of MUX is connected to the next flipflop. All these flipflops are synchronous with each other since tge same clock signal is applied to each flipflop. A PISO shift register is used to convert parallel data to serial data.

4. Parallel In Parallel Out shift register (PIPO)

The shift register which allows parallel input and also produces a parallel output is known as PIPO shift register. The logic circuit consists of four D flipflops which are connected. The clear signal and clock signals are connected to all the four flipflops. There is no interconnection between the individual flipflops in this type of register since no serial shifting of the data is required. Data is given as input separately for each for each flipflops and in tge same way output also collected individually from each flipflop.

A PIPO shift register is used as a temporary storage device and like SISO Shift register, it act as a delay element.