A counter (a counter of the number of pulses) is a device at the outputs of which a binary code is obtained, determined by the number of received pulses. Counters can be built on two-stage D-flip-flops, T-flip-flops and JK-flip-flops.
The main parameter of the counter is the counter module - the maximum number of pulses that can be counted by the counter. Thus, the counter forms a sequence of binary numbers from zero to 2n - 1, where n is the bit capacity of the counter. A modulo 13 counter needs at least 4 bits (triggers) and a reset circuit that will reset the counter outputs to zero when the maximum value (13) is reached.
Consider an example of counter synthesis from a dynamic D trigger. In order to turn the D trigger into a countable one, it is necessary to introduce a feedback circuit from the inverse output of this trigger to the input.
To count the number of pulses greater than 2, you need to use the output signal of the first counting trigger as an input signal for the next trigger, that is, connect the triggers in series. So you can build any counter that will count to a maximum number that is a multiple of two.
The reset circuit is synthesized from the truth table. To reset, it is necessary that the 2 high order bits are in state 1 and 1 is also present on any of the two lower order bits.
Counter Operation Result: