Answer to Question #50166 in Electric Circuits for tristan

Question

Consider a D-type flip-flop.
The input to D changes from a logic 1 to a logic 0 just after the falling edge of the clock.
Qn=1 at the time D changes. Which of the following is true?


1.at the falling edge of the clock, Qn+1=0

2.at the falling edge of the clock, Qn+1=1

3.at the rising edge of the clock, Qn+1=0

4.at the rising edge of the clock, Qn+1=1