Question #242670

A common bus system which is capable of transferring 8 bits at time with number of

registers are 2 each register is of 8bit? Draw circuit diagram for this and also define how

many multiplexers are required and what will be the size of multiplexer with truth table

Also explain how to gather data from this bus back into register

registers are 2 each register is of 8bit? Draw circuit diagram for this and also define how

many multiplexers are required and what will be the size of multiplexer with truth table

Also explain how to gather data from this bus back into register

Expert's answer

Given data,

The number of registers are 4

Each register is of 8-bits

Common bus transfers 8-bits at a time.

**Circuit diagram**

Assuming four registers are

1) a-reg

2) b-reg

3) c-reg

4) d-reg

And eight bits of each register are defined as

1) a7, a6, ..., a0

2) b7, b6, ..., b0

3) c7, c6, ..., c0

4) d7, d6, ..., d0

**Eight 4:1 Muxes are required to design this system**,

**4:1 MUX since there are 4 registers.**

**Eight MUXes since each register is of 8-bits**

All the LSB's are connected as inputs to one of the 4:1 MUXes

Similarly, all bit 1's of each register is connected to one MUX

Finally, all MSB's are connected to the final 4:1 MUX

Two selection lines S1 and S0 are used to select the register and transfer them to the 8-bit bus

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