Answer to Question #242043 in Electrical Engineering for anthapu

Question

A common bus system which is capable of transferring 8 bits at time with number of registers are 4 and each register is of 8 bits? Draw circuit diagram for this and also define how many multiplexers are required and what will be the size of multiplexer with truth table

Answer 1

As shown above, the two selection lines S1 and S0 are connected to the selection inputs of all four multiplexers. The selection lines choose the four bits of one register and transfer them into the four-line common bus. When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that form the bus. This causes the bus lines to receive the content of register A since the outputs of this register are connected to the 0 data inputs of the multiplexers. Similarly, register B is selected if S1S0 = 01, and so on. The diagram above shows the register that is selected by the bus for each of the four possible binary value of the selection lines. Given the above ilsutation, a 4-input MUX would be the most approriate choice to use. The truth table is shown below: