Answer to Question #241135 in Electrical Engineering for rockey

Question

A common bus system which is capable of transferring 2 bits at time with number of registers are 4 each register is of 2 bit? Draw circuit diagram for this and also define how many multiplexers are required and what will be the size of multiplexer with truth table Also explain how to gather data from this bus back into register    

Answer 1

We understand that the Boolean expression for this 4-to-1 Multiplexer with inputs A to D and data select lines a, b can be represented as:

Q = abA + abB + abC + abD

We 4 registers of 2 bits, the most recommended multiplexer is a 4-to-1:

In the representation below, at any one instant in time only ONE of the four analogue switches is closed, connecting only one of the input lines A to D to the single output at Q. As to which switch is closed depends upon the addressing input code on lines “a” and “b“.

Therefore, to select input B to the output at Q, the binary input address would need to be “a” = logic “1” and “b” = logic “0”.