Suppose you had reduced a 32-variable Boolean expression using Quine–McCluskey algorithm to a 12-variable expression. For the generated simplified expression, you are required to implement it into a digital logic circuit. You can only use Programmable Array Logic (PAL) or Programmable Logic Array (PLA) devices.
Assume that we had selected a Programmable Array Logic (PAL) and a Programmable Logic Array (PLA) for you to choose between.
1. Using TICPAL22V10Z-25C (Programmable Array Logic)
2. Using PLUS173–10 (Programmable Logic Array).
Your selections among stated PLA and PAL must consider the following constraints:
The 32-variable Boolean expression is reduced using Quine–McCluskey algorithm to a 12-variable expression. For this Programmable Logic Array (PLA) devices will be used.
It is selected because:
Complexity: In this array of AND and OR gates it is less prolific and Large and complex number of problem can be solved than PAL devices.
Flexibility: Provides more programming flexibility than PAL devices.
Speed: It is having very high speed as compared to PAL devices.
Functionality: In PLA Large number of functions can be implemented but in PAL a limited number of functions can be implemented.
Cost: The cost of PLA is higher than PAL, but it can certainly be did while doing large and complex problems of 32 bits.
For this Programmable Logic Array (PLA) devices the transistor used is PLUS173–10 (Programmable Logic Array).
Features of this PLA is:
propagation delay = 10ns
It has two programmable arrays.
It can supports 32 input-wide OR functions.
It is having 12 inputs.
It has programmable output polarity.
It has 3- state outputs.
It has power dissipation of 850mW and TTL compatible.
The DC electrical characterics is: